Computer engineering researchers at North Carolina State University have developed new software and hardware designs that should limit programming errors and improve system performance in devices that use non-volatile memory (NVM) technologies.
“Currently, computers rely on dynamic random access memory (DRAM) for their operations,” says James Tuck, an associate professor of electrical and computer engineering at NC State and co-author of two papers on the work. “But DRAM has significant limitations, making it difficult to scale up to deal with next generation systems.
“As a result, next generation computer systems will likely rely on emerging NVM technologies for both operations and data storage. Our work here is focused on addressing some of the programming and performance challenges inherent in shifting from a DRAM computing paradigm to NVM,” says Yan Solihin, a professor of electrical and computer engineering at NC State and co-author of the papers.
One challenge with NVM systems is determining how to log, or save, a chunk of memory before making changes to it. These logs allow users to reset memory if the system fails, corrupting the memory that is being modified. At present, logging in an NVM system would require programmers to incorporate additional code into their programs – slowing performance and increasing the number of operations that write over memory. Memory reliability suffers if it is written over too often.
To address this, researchers have developed a system called Proteus, which includes a software model and complementary hardware. The researchers compared the performance of Proteus against other techniques in a detailed simulator, finding that other techniques wrote to memory two to six times more than Proteus, meaning Proteus was much better at preserving the long-term reliability of memory.
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